Wednesday, August 17, 2016

Work Product

In the following post is summarized the overall work that has been done during the GSoC.

Completed Work

  1.  Color Space Conversion Module with parallel inputs and parallel outputs interface
  2. Color Space Conversion Module with serial inputs and serial outputs interface
  3. 1D-DCT Module
  4. 2D-DCT Module
  5. Zig-Zag Scan Module
  6. Complete Frontend Part of the Encoder
  7. Block Buffer
  8. Input Block Buffer
All the above modules except 7 and 8 are merged in the main repository. Each module is verified for it's correct behavior with a software reference and additional MyHDL and vhdl/verilog convertible testbenches created for each module. All the modules are modular and scalable in terms of the NxN blocks which they can process and the fractional bits for the fixed point computations which they can handle. The documentation for the overall project is here and could be created using make html. Also, the documentation can be seen online here.The documentation includes the description for each module, interface, testbench and additionally the coverage results for each module and the synthesis results for the complete frontend part.

Github Links

      1. https://github.com/jandecaluwe/myhdl/pull/156
      2. https://github.com/cfelton/test_jpeg/pull/33
      3. https://github.com/mkatsimpris/test_jpeg/pull/2
      4. https://github.com/mkatsimpris/test_jpeg/pull/3
      5. https://github.com/cfelton/test_jpeg/pull/12
      6. https://github.com/mkatsimpris/test_jpeg/pull/4
      7. https://github.com/cfelton/test_jpeg/pull/13
      8. https://github.com/mkatsimpris/test_jpeg/pull/5
      9. https://github.com/cfelton/test_jpeg/pull/18
      10. https://github.com/cfelton/test_jpeg/pull/23
      11. https://github.com/cfelton/test_jpeg/pull/35
      12. https://github.com/cfelton/test_jpeg/pull/39
      13. https://github.com/cfelton/test_jpeg/pull/41

  • List of all PRs in the main repo: here

Work Product

In the following post is summarized the overall work that has been done during the GSoC.

Completed Work

  1.  Color Space Conversion Module with parallel inputs and parallel outputs interface
  2. Color Space Conversion Module with serial inputs and serial outputs interface
  3. 1D-DCT Module
  4. 2D-DCT Module
  5. Zig-Zag Scan Module
  6. Complete Frontend Part of the Encoder
  7. Block Buffer
  8. Input Block Buffer
All the above modules except 7 and 8 are merged in the main repository. Each module is verified for it's correct behavior with a software reference and additional MyHDL and vhdl/verilog convertible testbenches created for each module. All the modules are modular and scalable in terms of the NxN blocks which they can process and the fractional bits for the fixed point computations which they can handle. The documentation for the overall project is here and could be created using make html. Also, the documentation can be seen online here.The documentation includes the description for each module, interface, testbench and additionally the coverage results for each module and the synthesis results for the complete frontend part.

Github Links

      1. https://github.com/jandecaluwe/myhdl/pull/156
      2. https://github.com/cfelton/test_jpeg/pull/33
      3. https://github.com/mkatsimpris/test_jpeg/pull/2
      4. https://github.com/mkatsimpris/test_jpeg/pull/3
      5. https://github.com/cfelton/test_jpeg/pull/12
      6. https://github.com/mkatsimpris/test_jpeg/pull/4
      7. https://github.com/cfelton/test_jpeg/pull/13
      8. https://github.com/mkatsimpris/test_jpeg/pull/5
      9. https://github.com/cfelton/test_jpeg/pull/18
      10. https://github.com/cfelton/test_jpeg/pull/23
      11. https://github.com/cfelton/test_jpeg/pull/35
      12. https://github.com/cfelton/test_jpeg/pull/39
      13. https://github.com/cfelton/test_jpeg/pull/41

  • List of all PRs in the main repo: here

Friday, August 12, 2016

Documentation and Coverage Completed

The coverage, documentation, and synthesis results are in the PR. I am waiting for Chris to review them and tell me what to change.

Monday, August 8, 2016

Documentation

Today, I start writing the documentation for all of my modules and the complete frontend part. I will use Sphinx. As, the backend is not ready yet, I will try to fill the time by doing this task.

Sunday, August 7, 2016

Week 11

This week I complete the convertible tests for the frontend part and for the new color converter. Vikram, made a PR for the backend part, so the next days we can integrate it with my part and complete the encoder. However, the backend still lacks from complete test coverage with a software prototype. The next days till 15 Augoust which is the end of the coding period I will try to finish the following tasks:

1)Complete the encoder.
2)Ensure the correct behavior and the covertibility.
3)Synthesize it and take some measurements (resource utilization and max frequency).
4)Write documentation for all my module and clean up the code.