Block Buffer

Today, I implemented the convertible testbench for the block buffer and the triple_buffer.

The triple buffer has 4 block buffers which store the data from the video source (lines of image) and output then to the frontend part in 8x8 blocks. Each 8x8 block is output three times to the frontend. The video source and the overall design share the same clock. So, in order for the video source input data and the output data to be read correctly 4 buffers where used. The output of the data to the frontend is continuous. The input video source can stop sending data when the stop_source signal is valid. The stop signal is True when all the buffers are full and is False when the the 3 buffers were read from the frontend. The next thing that has to be done is to add docstrings in these modules.

Moreover, I completed and the convertible testbench for the new color space converter.

Frontend Synthesis and Block Buffer

This week I managed to eliminate the inferred latches in the design by changing the code. The unexpected latches cause a lot of timing problems. Moreover, I implemented a block buffer which takes each row serially and output a 8x8 block serially in the frontend. This block buffer needs a lot of documentation and a complete convertible testbench.

The following days I will try to complete the following uncompleted tasks

1)Include convertible testbenches in the changed designs of my modules.

2)Change pytest settings as Chris mentioned.

3)Complete the blockbuffer module

4) Glue together the backend and the frontend part to complete the encoder!!!

5) Clean up the code and write detailed documentation for each module.

Week 9

This week we had a lot of problems in defining the interfaces between the frontend and the backend part. From my part, I changed the method of the outputs from parallel to serial in order to communicate with the backend part without problems. 

Moreover, I synthesized the frontend part and from the design there are inferred some latches which cause a lot of timing problems. I changed some of the code and there are only some latches in the color converter which must be fixed.

Also, I created a new version of the frontend part and a new version for the color converter in order to output the data serially.

There are a lot of things to do in the next days:

1) Fix the inferred latches from the design.
2) Create the block buffer module for the frontend part.
3)Complete the encoder.
4)Complete the testbenches for the changed zig zag module and the new color space converter.
5)Write documentation for all the modules.

Week 8

This week passed with a lot of work. The frontend part of the encoder and the zig-zag module merged in the main repository. So, in this stage the frontend part is ready and the backend part of the encoder is missing in order to create the complete JPEG encoder. As discussed with Christopher, I have to write documentation for each module and don't leave it for the last days. Moreover, this week I will try to synthesize each module with different parameters and measure the utilization.

Week 7

The PR with the zig-zag module, is waiting to be merged and reviewed by Christopher. However, a new branch is created which contains the front-end part of the encoder. This part consists of the color-space conversion, dct-2d and zig-zag modules for 8x8 blocks. From a short discussion with Christopher, we decided that hardware utilization with different configurations of the modules should be compute. This will happen the following days.

Week 6

This week merged the 2d-dct and 1d-dct modules into the main repository. Moreover, a new branch (zig-zag) created which contains the zig-zag module and the test units. Christopher re-organized the contributed code and gave us some points to write a more compact style. In the following days, the code will be refactored according to Christopher's recommendations.

Zig-Zag Core

The 2d-dct and 1d-dct modules merged in the main repository by Christopher. Now, it's time for the zig-zag core to be implemented. In the following days I will create a new branch with the zig-zag core and it's unit test.