Sunday, June 19, 2016

Midterm Evaluation

Midterm evaluation comes this week, so, I will write a little summary of the things that I have done the previous weeks.

As I described in my proposal, the first 3 weeks I implemented the color space conversion module in myhdl. I wrote all the convertible test units (VHDL, MyHDL, and verilog) in order to prove the correct behavior of the module. Moreover, I familiarized with the travis-ci, landscape and coverage tools. I changed some files in the branch to make the travis-ci to work and to increase the coverage and health of my branch. Finally, the branch which I was working there my module got merged in the original repository.

In the 4th week, I experimented with different designs of 2d-dct and chosen a simple and straightforward architecture. In the previous posts, I described the design which I used and the some of the DCT theory. In my working branch of the 2d-dct, I uploaded the module of the 1d-dct with the convertible test-benches. The 1d-dct works fine and it's correct behavior it is shown form the test units and the different tests.

The following days, I will upload the full working 2d-dct module with the respective test units.

As Christopher proposed, we should use a minimal flow for our design and if it is possible to disregard complex FSMs. Thus, the flow in the frontend part of the encoder is kept as minimal as possible. Each pixel is inserted serially in the first module (Color Space Conversion) row by row for each 8x8 block of the image. The outputs of the color space conversion module (Y, Cb, Cr) are inserted parallely in three 2D-DCTs modules and each  of the 2D-DCTs modules after some cycles, outputs parallelly the 8x8 transformed block which consists of 64 signals. The positions of the 64 signals in the 3 8x8 blocks should be changed according to the zig-zag ordering. Then, the  3 blocks are inserted in the backend part for processing.

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